[Oisf-users] Tuning Suricata (2.0beta1) -- no rules and lots of packet loss
Cooper F. Nelson
cnelson at ucsd.edu
Wed Aug 21 18:18:44 UTC 2013
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But the queues still need to be bound to unique interrupts in order for
the load balancing to work correctly.
What does /proc/interrupts show on your system? You should have a
diagonal line like this if everything is balanced correctly:
> CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7 CPU8 CPU9 CPU10 CPU11 CPU12 CPU13 CPU14 CPU15
> 103: 3722726371 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PCI-MSI-edge eth2-TxRx-0
> 104: 11 3990396840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PCI-MSI-edge eth2-TxRx-1
> 105: 11 0 3798819134 0 0 0 0 0 0 0 0 0 0 0 0 10 PCI-MSI-edge eth2-TxRx-2
> 106: 21 0 0 3775353355 0 0 0 0 0 0 0 0 0 0 0 0 PCI-MSI-edge eth2-TxRx-3
> 107: 11 10 0 0 3418796783 0 0 0 0 0 0 0 0 0 0 0 PCI-MSI-edge eth2-TxRx-4
> 108: 14 0 0 0 0 3596008575 0 0 0 0 0 0 0 0 13 0 PCI-MSI-edge eth2-TxRx-5
> 109: 21 0 0 0 0 0 3758494181 0 0 0 0 0 0 0 0 0 PCI-MSI-edge eth2-TxRx-6
> 110: 11 10 0 0 0 0 0 3844250384 0 0 0 0 0 0 0 0 PCI-MSI-edge eth2-TxRx-7
> 111: 11 0 0 0 0 0 0 0 3463784961 10 0 0 0 0 0 0 PCI-MSI-edge eth2-TxRx-8
> 112: 21 0 0 0 0 0 0 0 0 3608113747 0 0 0 0 0 0 PCI-MSI-edge eth2-TxRx-9
> 113: 11 10 0 0 0 0 0 0 0 0 3635890389 0 0 0 0 0 PCI-MSI-edge eth2-TxRx-10
> 114: 11 0 0 0 0 0 0 0 10 0 0 3687391768 0 0 0 0 PCI-MSI-edge eth2-TxRx-11
> 115: 21 0 0 0 0 0 0 0 0 0 0 0 3533849815 0 0 0 PCI-MSI-edge eth2-TxRx-12
> 116: 11 10 0 0 0 0 0 0 0 0 0 0 0 3487041540 0 0 PCI-MSI-edge eth2-TxRx-13
> 117: 11 0 0 10 0 0 0 0 0 0 0 0 0 0 3521147102 0 PCI-MSI-edge eth2-TxRx-14
> 118: 21 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3774862342 PCI-MSI-edge eth2-TxRx-15
> 119: 7 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 PCI-MSI-edge eth2
On 8/21/2013 11:11 AM, Tritium Cat wrote:
> Re: hardware queues. I know that is the case from testing as I was using
> 12 queues per port to distribute the four ports among 48 cores. See [1]
> for reference "16 hardware queues per port". Before you dismiss that as
> unofficial documentation those vendors typically cut/paste right from the
> vendor docs. I'm trying to find the specific quote from the Intel
> documentation but I cannot find it at the moment. As I understood it, that
> is the benefit to multi-port cards such as the Silicom 6-port 10G card,
> more hardware queues.
>
Cooper Nelson
Network Security Analyst
UCSD ACT Security Team
cnelson at ucsd.edu x41042
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